From 7fd8b6bde9643355f0d339baeff2a270d0941e3a Mon Sep 17 00:00:00 2001
From: Pratham Patel <thefirst1322@gmail.com>
Date: Tue, 12 Dec 2023 18:20:26 +0530
Subject: [PATCH] enable all configs that I felt were necessary

---
 config-aarch64 | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/config-aarch64 b/config-aarch64
index ff31466..ff19d15 100644
--- a/config-aarch64
+++ b/config-aarch64
@@ -3551,7 +3551,7 @@ CONFIG_AT803X_PHY=m
 CONFIG_QSEMI_PHY=m
 CONFIG_REALTEK_PHY=y
 # CONFIG_RENESAS_PHY is not set
-CONFIG_ROCKCHIP_PHY=m
+CONFIG_ROCKCHIP_PHY=y
 CONFIG_SMSC_PHY=m
 CONFIG_STE10XP=m
 CONFIG_TERANETICS_PHY=m
@@ -4725,7 +4725,7 @@ CONFIG_SPI_ORION=m
 CONFIG_SPI_PCI1XXXX=m
 CONFIG_SPI_PL022=m
 # CONFIG_SPI_PXA2XX is not set
-CONFIG_SPI_ROCKCHIP=m
+CONFIG_SPI_ROCKCHIP=y
 # CONFIG_SPI_ROCKCHIP_SFC is not set
 CONFIG_SPI_QCOM_QSPI=m
 CONFIG_SPI_QUP=m
@@ -8549,7 +8549,7 @@ CONFIG_MMC=y
 CONFIG_PWRSEQ_EMMC=y
 CONFIG_PWRSEQ_SD8787=m
 CONFIG_PWRSEQ_SIMPLE=y
-CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK=y
 CONFIG_MMC_BLOCK_MINORS=8
 CONFIG_SDIO_UART=m
 # CONFIG_MMC_TEST is not set
@@ -8568,10 +8568,10 @@ CONFIG_MMC_SDHCI_PCI=m
 CONFIG_MMC_RICOH_MMC=y
 CONFIG_MMC_SDHCI_ACPI=m
 CONFIG_MMC_SDHCI_PLTFM=m
-CONFIG_MMC_SDHCI_OF_ARASAN=m
+CONFIG_MMC_SDHCI_OF_ARASAN=y
 # CONFIG_MMC_SDHCI_OF_AT91 is not set
 CONFIG_MMC_SDHCI_OF_ESDHC=m
-CONFIG_MMC_SDHCI_OF_DWCMSHC=m
+CONFIG_MMC_SDHCI_OF_DWCMSHC=y
 CONFIG_MMC_SDHCI_CADENCE=m
 CONFIG_MMC_SDHCI_ESDHC_IMX=m
 CONFIG_MMC_SDHCI_TEGRA=m
@@ -8579,7 +8579,7 @@ CONFIG_MMC_SDHCI_PXAV3=m
 CONFIG_MMC_SDHCI_F_SDH30=m
 # CONFIG_MMC_SDHCI_MILBEAUT is not set
 CONFIG_MMC_SDHCI_IPROC=m
-CONFIG_MMC_MESON_GX=m
+CONFIG_MMC_MESON_GX=y
 CONFIG_MMC_MESON_MX_SDIO=m
 CONFIG_MMC_ALCOR=m
 CONFIG_MMC_SDHCI_MSM=m
@@ -8596,7 +8596,7 @@ CONFIG_MMC_DW_EXYNOS=m
 CONFIG_MMC_DW_HI3798CV200=m
 CONFIG_MMC_DW_K3=m
 CONFIG_MMC_DW_PCI=m
-CONFIG_MMC_DW_ROCKCHIP=m
+CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_VUB300=m
 CONFIG_MMC_USHC=m
 # CONFIG_MMC_USDHI6ROL0 is not set
@@ -9945,7 +9945,7 @@ CONFIG_QCOM_SPMI_RRADC=m
 CONFIG_QCOM_SPMI_IADC=m
 CONFIG_QCOM_SPMI_VADC=m
 CONFIG_QCOM_SPMI_ADC5=m
-CONFIG_ROCKCHIP_SARADC=m
+CONFIG_ROCKCHIP_SARADC=y
 CONFIG_RICHTEK_RTQ6056=m
 CONFIG_SD_ADC_MODULATOR=m
 CONFIG_STMPE_ADC=m
@@ -10603,9 +10603,9 @@ CONFIG_PHY_QCOM_USB_SS=m
 CONFIG_PHY_QCOM_SGMII_ETH=m
 CONFIG_PHY_ROCKCHIP_DP=m
 CONFIG_PHY_ROCKCHIP_DPHY_RX0=m
-CONFIG_PHY_ROCKCHIP_EMMC=m
+CONFIG_PHY_ROCKCHIP_EMMC=y
 CONFIG_PHY_ROCKCHIP_INNO_HDMI=m
-CONFIG_PHY_ROCKCHIP_INNO_USB2=m
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY=m
 CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m
 CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=m
@@ -10718,7 +10718,7 @@ CONFIG_NVMEM_QCOM_QFPROM=m
 CONFIG_NVMEM_QCOM_SEC_QFPROM=m
 CONFIG_NVMEM_RMEM=m
 CONFIG_NVMEM_ROCKCHIP_EFUSE=m
-CONFIG_NVMEM_ROCKCHIP_OTP=m
+CONFIG_NVMEM_ROCKCHIP_OTP=y
 # CONFIG_NVMEM_SNVS_LPGPR is not set
 CONFIG_NVMEM_SPMI_SDAM=m
 CONFIG_NVMEM_SUNXI_SID=m