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2c3a61b9d2
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specify BL31 for libretech_all_h5_cc_h5
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2023-11-10 22:08:21 +05:30 |
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2eae960b29
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make specifying BL31 and ROCKCHIP_TPL better-er
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2023-11-10 22:04:45 +05:30 |
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8620d2f20a
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bump master_commit to the latest commit in master branch (at this time)
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2023-11-06 18:47:10 +05:30 |
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57e9aeab10
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last commit accidentally used "master", revert to the intended version (2024.01-rc1)
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2023-11-06 07:46:11 +05:30 |
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5b6d675d95
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bump rock5b-rk3588.spec to 2024.01-rc1 for PCIe
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2023-11-06 07:41:21 +05:30 |
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d61e837783
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revert 9074b22ca6 because I selected the x86 chroot in COPR; COPR is fine
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2023-10-28 13:53:53 +05:30 |
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fc01b0b38a
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maybe try using the full path
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2023-10-28 13:46:51 +05:30 |
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9074b22ca6
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Try fixing COPR builds
COPR builds fail with the following error:
```
cc1: warning: unknown register name: x18
cc1: error: bad value ('armv8-a+crc') for '-march=' switch
cc1: note: valid arguments to '-march=' switch are: nocona core2 nehalem corei7 westmere sandybridge corei7-avx ivybridge core-avx-i haswell core-avx2 broadwell skylake skylake-avx512 cannonlake icelake-client rocketlake icelake-server cascadelake tigerlake cooperlake sapphirerapids alderlake bonnell atom silvermont slm goldmont goldmont-plus tremont knl knm x86-64 x86-64-v2 x86-64-v3 x86-64-v4 eden-x2 nano nano-1000 nano-2000 nano-3000 nano-x2 eden-x4 nano-x4 k8 k8-sse3 opteron opteron-sse3 athlon64 athlon64-sse3 athlon-fx amdfam10 barcelona bdver1 bdver2 bdver3 bdver4 znver1 znver2 znver3 btver1 btver2 native
make[1]: *** [scripts/Makefile.build:146: lib/asm-offsets.s] Error 1
```
Try fixing it by exporting CROSS_COMPILE as 'aarch64-redhat-linux-'
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2023-10-28 13:32:19 +05:30 |
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e5121c3fb4
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fix versioning
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2023-10-28 13:18:15 +05:30 |
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47aefc2f46
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at the moment, there is no u-boot-rockchip-spi.bin for OPi5-s
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2023-10-28 12:45:14 +05:30 |
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b5b6ab07ff
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init commit
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2023-10-28 12:37:20 +05:30 |
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